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| 6 and 8-Channel Low Capacitance ESD Arrays CM1216 Features * * * * * * * * * * Six and eight channels of ESD protection Provides +15 kV ESD protection on each channel per the IEC 61000-4-2 ESD requirements Channel loading capacitance of 1.6 pF typical Channel I/O to GND capacitance difference of 0.04pF typical Mutual capacitance of 0.13pF typical Minimal capacitance change with temperature and voltage Each I/O pin can withstand over 1000 ESD strikes SOIC and MSOP packages RoHs-compliant, lead-free packaging Product Description The CM1216 family of diode arrays provide sESD protection for electronic components or sub-systems requiring minimal capacitive loading. These devices are ideal for protecting systems with high data and clock rates or for circuits requiring low capacitive loading. Each ESD channel consists of a pair of diodes in series which steer the positive or negative ESD current pulse to either the positive (VP) or negative (VN) supply rail. The CM1216 protects against ESD pulses up to +15kV per the IEC 610004-2 standard. This device is particularly well-suited for protecting systems using high-speed ports such as USB2.0, IEEE1394 (Firewire(R), iLinkTM), Serial ATA, DVI, HDMI and corresponding ports in removable storage, digital camcorders, DVD-RW drives and other applications where extremely low loading capacitance with ESD protection are required in a small package footprint. Applications * * * * * IEEE1394 Firewire(R) ports at 400Mbps / 800Mbps DVI ports, HDMI ports in notebooks, set top boxes, digital TVs, LCD displays Serial ATA ports in desktop PCs and hard disk drives PCI Express ports General purpose high-speed data line ESD protection Block Diagram (c)2010 SCILLC. All rights reserved. April 2010 - Rev. 2 Publication Order Number: CM1216/D CM1216 Pin Configurations Pin Information PIN DESCRIPTIONS MSOP-8 PIN NAME SOIC-8 PIN NO. MSOP-10 PIN NO. TYPE DESCRIPTION ESD Channel ESD Channel ESD Channel ESD Channel Negative voltage supply rail ESD Channel ESD Channel Positive voltage supply rail ESD Channel ESD Channel PIN NO. CH1 CH2 CH3 CH4 VN CH5 CH6 VP CH7 CH8 1 2 4 5 3 6 8 7 - - 1 2 4 5 3 6 8 7 - - 1 2 3 4 5 6 7 8 9 10 I/O I/O I/O I/O GND I/O I/O PWR I/O I/O Rev. 2 | Page 2 of 13 | www.onsemi.com CM1216 Ordering Information PART NUMBERING INFORMATION Lead-free Finish Pins 8 8 10 Package SOIC MSOP MSOP Ordering Part Number CM1216-06SM CM1216-06MR CM1216-08MR 1 Part Marking E166 E166 E168 Note 1: Parts are shipped in Tape and Reel form unless otherwise specified. Specifications ABSOLUTE MAXIMUM RATINGS PARAMETER Operating Supply Voltage (VP-VN) Diode Forward DC Current (Note 1) DC Voltage at any Channel Input Operating Temperature Range Ambient Junction Storage Temperature Range RATING 6 20 (VN-0.5) to (VP+0.5) -40 to +85 -40 to +125 -40 to +150 UNITS V mA V C C C Standard Operating Conditions STANDARD OPERATING CONDITIONS PARAMETER Temperature Range (Ambient) Package Power Rating MSOP8 Package (CM1216-06MR) SOIC8 Package (CM1216-06SM) MSOP10 Package (CM1216-08MR) RATING -40 to +85 400 600 400 UNITS C mW mW mW Rev. 2 | Page 3 of 13 | www.onsemi.com CM1216 ELECTRICAL OPERATING CHARACTERISTICS SYMBOL VP PARAMETER Operating Supply Voltage (VP-VN) Operating Supply Current Diode Forward Voltage Top Diode Bottom Diode Channel Leakage Current Channel Input Capacitance (VP-VN) = 3.3V IF = 20mA; TA=25 C 0.6 0.6 TA = 25 VP= 5V, VN = 0V C; At 1 MHz, VP=3.3V, VN =0V, VIN=1.65V;Note2 CONDITIONS MIN NOTE 1 TYP 3.3 MA X 5.5 UNIT V IP VF 8 A 0.8 0.8 0.1 1.6 0.95 0.95 1.0 2.0 V V A pF ILEAK CIN CIN CMUTUAL VESD Channel Input Capacitance Matching Mutual Capacitance ESD Protection Peak Discharge Voltage at any channel input, in system, contact discharge per IEC 61000-42 standard Channel Clamp Voltage Positive Transients Negative Transients Dynamic Resistance Positive transients Negative transients (VP-VN) = 3.3V Notes 2 and 3; TA = 25 C 15 0.04 pF 0.13 pF kV VCL IPP = 1A, tP = 8/20S; TA=25 C +9.0 -1.5 IPP = 1A, tP = 8/20S; TA=25 C 0.6 0.4 V V RDYN Note 1: All parameters specified at TA = -40 to +85 unless otherwise noted. C C Note 2: Standard IEC 61000-4-2 with CDischarge = 150pF, RDischarge = 330, VP = 3.3V, VN grounded. Note 3: From I/O pins to VP or VN only. VP bypassed to VN with low ESR 0.2F ceramic capacitor. Rev. 2 | Page 4 of 13 | www.onsemi.com CM1216 Performance Characteristics Figure 1. Typical Variation of CIN vs. VIN (f = 1MHz, VP= 3.3V, VN = 0V, 0.1F chip capacitor between VP and VN, TA = 25 C) Rev. 2 | Page 5 of 13 | www.onsemi.com CM1216 Application Information Design Considerations In order to realize the maximum protection against ESD pulses, care must be taken in the PCB layout to minimize parasitic series inductances on the Supply/Ground rails as well as the signal trace segment between the signal input (typically a connector) and the ESD protection device. Refer to Application of Positive ESD Pulse between Input Channel and Ground, which illustrates an example of a positive ESD pulse striking an input channel. The parasitic series inductance back to the power supply is represented by L1 and L2. The voltage VCL on the line being protected is: VCL = Fwd + L2 x d(IESD ) / dt voltage drop of D1 + VSUPPLY + L1 x d(IESD ) / dt where IESD is the ESD current pulse, and VSUPPLY is the positive supply voltage. An ESD current pulse can rise from zero to its peak value in a very short time. As an example, a level 4 contact discharge per the IEC61000-4-2 standard results in a current pulse that rises from zero to 30 Amps in 1ns. Here -9 d(IESD)/dt can be approximated by IESD/t, or 30/(1x10 ). So just 10nH of series inductance (L1 and L2 combined) will lead to a 300V increment in VCL! Similarly for negative ESD pulses, parasitic series inductance from the VN pin to the ground rail will lead to drastically increased negative voltage on the line being protected. The CM1213 has an integrated Zener diode between VP and VN. This greatly reduces the effect of supply rail inductance L2 on VCL by clamping VP at the breakdown voltage of the Zener diode. However, for the lowest possible VCL, especially when VP is biased at a voltage significantly below the Zener breakdown voltage, it is recommended that a 0.22F ceramic chip capacitor be connected between VP and the ground plane. As a general rule, the ESD Protection Array should be located as close as possible to the point of entry of expected electrostatic discharges. The power supply bypass capacitor mentioned above should be as close to the VP pin of the Protection Array as possible, with minimum PCB trace lengths to the power supply, ground planes and between the signal input and the ESD device to minimize stray series inductance. Additional Information See also California Micro Devices Application Note AP209, "Design Considerations for ESD Protection", in the Applications section at www.calmicro.com. Figure 3. Application of Positive ESD Pulse between Input Channel and Ground Rev. 2 | Page 6 of 13 | www.onsemi.com CM1216 Mechanical Details The CM1216 is available in SOIC-8, MSOP-8, and MSOP-10 packages with a lead-free finishing. SOIC-8 Mechanical Specifications The CM1216-06SM is supplied in an 8-pin SOIC package. Dimensions are presented below. * PACKAGE DIMENSIONS Package Pins Dimensions Millimeters Min A A1 B C D E e H L # per tape and reel 1.35 0.10 0.33 0.19 4.80 3.80 Max 1.75 0.25 0.51 0.25 5.00 4.19 Min 0.053 0.004 0.013 0.007 0.189 0.150 SOIC 8 Inches Max 0.069 0.010 0.020 0.010 0.197 0.165 1.27 BSC 5.80 0.40 6.20 1.27 0.050 BSC 0.228 0.016 0.244 0.050 2500 pieces Controlling dimension: inches Package Dimensions for SOIC-8 Rev. 2 | Page 7 of 13 | www.onsemi.com CM1216 Tape and Reel Specifications PART NUMBER CM1216-06SM PACKAGE SIZE (mm) 4.90 X 6.00 X 1.55 POCKET SIZE (mm) B0 X A0 X K0 5.30 X 6.50 X 2.10 TAPE WIDTH W 12mm REEL DIAMETER 330mm (13") QTY PER REEL 2500 P0 4mm P1 8mm Rev. 2 | Page 8 of 13 | www.onsemi.com CM1216 Mechanical Details (Cont'd) MSOP-8 Mechanical Specifications: The CM1216-06MR is supplied in an 8-pin MSOP package. Dimensions are presented below. PACKAGE DIMENSIONS Package Pins Dimensions Millimeters Min A A1 B C D E e H L # per tape and reel 0.75 0.05 0.28 0.13 2.90 2.90 Max 0.95 0.15 0.38 0.23 3.10 3.10 Min 0.030 0.002 0.011 0.005 0.114 0.114 MSOP TOP VIEW D 8 7 6 5 8 Inches Max 0.037 0.006 0.015 0.009 0.122 0.122 SEA TING PLANE 1 2 3 4 H Pin 1 Marking E SIDE VIEW A A1 B e 0.65 BSC 4.90 BSC 0.40 0.70 0.026 BSC 0.193 BSC 0.016 0.028 END VIEW C 4000 pieces L Controlling dimension: millimeters Package Dimensions for MSOP-8 Rev. 2 | Page 9 of 13 | www.onsemi.com CM1216 Tape and Reel Specifications PART NUMBER CM1213-06MR PACKAGE SIZE (mm) 3.00 X 3.00 X 0.85 POCKET SIZE (mm) B0 X A0 X K0 3.3 X 5.3 X1.3 TAPE WIDTH W 12mm REEL DIAMETER 330mm (13") QTY PER REEL 4000 P0 4mm P1 8mm Rev. 2 | Page 10 of 13 | www.onsemi.com CM1216 Mechanical Details (cont'd) MSOP-10 Mechanical Specifications The CM1213-08MR is supplied in a 10-pin MSOP package. Dimensions are presented below. * PACKAGE DIMENSIONS TOP VIEW Package Pins Dimensions Millimeters Min A A1 B C D E e H L # per tape and reel 0.75 0.05 0.17 0.13 2.90 2.90 Max 0.95 0.15 0.33 0.23 3.10 3.10 MSOP 10 Inches Min 0.028 0.002 0.007 0.005 0.114 0.114 Max 0.038 0.006 0.013 0.009 0.122 0.122 1 2 10 9 D 8 7 6 H Pin 1 Marking E 3 4 5 SIDE VIEW A 0.50 BSC 4.90 BSC 0.40 0.70 0.0196 BSC 0.193 BSC 0.0137 4000 0.029 END VIEW SEA ING T PLANE A1 B e C Controlling dimension: inches L Package Dimensions for MSOP-10 Rev. 2 | Page 11 of 13 | www.onsemi.com CM1216 Tape and Reel Specifications PART NUMBER CM1216-08MR PACKAGE SIZE (mm) 3.00 X 3.00 X 0.85 POCKET SIZE (mm) B0 X A0 X K0 3.3 X 5.3 X1.3 TAPE WIDTH W 12mm REEL DIAMETER 330mm (13") QTY PER REEL 4000 P0 4mm P1 8mm Rev. 2 | Page 12 of 13 | www.onsemi.com CM1216 ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81-3-5773-3850 For additional information, please contact your local Sales Representative Order Literature: http://www.onsemi.com/orderlit ON Semiconductor Website: www.onsemi.com Rev. 2 | Page 13 of 13 | www.onsemi.com |
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